000			00768nam a2200229 a 4500
003			(BD-SpBAUS)
005			20230724104311.0
008			230724b2017 |||a|||| |||| 001 0 eng d
020			_a9781259837913
040			_aBD-SpBAUS _cBD-SpBAUS
041			_aeng
082			_223 _a621.395 _bUND 2017
100			_aÜnsalan, Cem _91779
245			_aDigital System Design with FPGA : _bimplementation using Verilog and VHDL / _cCem Ünsaln, Bora Tar.
260			_aNew York : _bMcGraw Hill, _cc2017
300			_a6060 p. : _bill. ; _c26 cm.
504			_aInclude index and references
650			_aVHDL (Computer hardware description language) _91780
650			_aVerilog (Computer hardware description language) _91781
700			_aTar, Bora _91782
942			_2ddc _cBK _n0
999			_c743 _d743